RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures

Most modern CPU architectures are based on the von Neumann principle, where memory and processing units separate entities. Although unit performance has improved over years, capacity not followed same trend, creating a gap between them. This problem is known as "memory wall" severely limits of microprocessor. One most promising solutions "logic-in-memory" approach. It consists merging logic units, enabling data to be processed directly inside itself. Here we propose an RISC-V framework that supports logic-in-memory operations. We substitute with circuit capable storing performing in-memory computation. The standard interface, so different can inserted microprocessor, both CMOS emerging technologies. main advantage this possibility comparing code execution. demonstrate effectiveness using volatile new technology, racetrack logic. results improvement in algorithm execution speed reduction energy consumption.